Research Projects



RSIM Simulator

RSIM Project (old)

Memory Models (old)




RSIM Group Publications

Refereed Publications and Current Submissions

Other Publications

Ph.D. Theses

M.S. Theses


Refereed Publications and Current Submissions


Other Publications

  • Performance Simulation Tools, S. S. Mukherjee, S. V. Adve, T. Austin, J. Emer, and P. S. Magnusson, IEEE Computer, vol. 29, no. 12, guest editors' introduction to the special issue on high performance simulators, February 2002, 38-39.


Ph.D. Theses

        General-Purpose Processors for Multimedia Applications: Predictability and Energy Efficiency, Christopher Hughes, 2003.

        Exploiting Instruction-Level Parallelism for Memory System Performance, Vijay Pai, 2000

        General-Purpose Architectures for Media Processing and Database Workloads, Parthasarathy Ranganthan, 2000.


M.S. Theses

        Integrated Global and Per-Application Cross-Layer Adaptations for Saving Energy, Vibhore Vardhan, 2004

        Joint Processor-Memory Adaptation for Energy for General-Purpose Applications, Ritu Gupta, 2004

        Architectural Adaptation for Thermal Control, Jayanth Srinivasan, 2002

        Combining Intra-Frame with Inter-Frame Hardware Adaptations to Save Energy, Ruchira Sasanka, 2002

        Soft Real-Time Scheduling on a Simultaneous Multithreaded Processor, Rohit Jain, 2002

        Variability in the Execution of Multimedia Applications and Implications for Architecture, Praful Kaul, 2002

        Prefetching Linked Data Structures in Sustems with Merged DRAM-Logic, Chris J. Hughes, 2002

        Improving the Speed vs. Accuracy Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors, S. Murthy Durbhakula, 1998

        Fine-Grain Producer-Initiated Communication in Cache-Coherent Multiprocessors, Hazim Abdel-Shafi, 1997

        The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology, Vijay Pai, 1997

        An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors, Parthasarathy Ranganathan, 1997