The following lists known bugs in RSIM, with suggested fixes. Each bug report includes
a short description of the bug and the suggested fix. Additionally, the bug
report also classifies the bug into one of four classes based on the impact
they could have on the results.
Attention, Solaris 2.6 users. We have had a couple of users write to us that they had problems when they compiled the applications using the newer Solaris version 2.6 libraries. Until the time we get to look at the code for the 2.6 libraries, it is recommended that all users continue to compile the applications with the Solaris 2.5 libraries
Compilation errors specific to some OS/Compiler vesions. Some OS/Compiler versions can occasionally produce compilation errors described in bug 25 and 26. If you get those errors, please use the fixes in the bug reports.
Bugs in RSIM version 1.0
Bugs in RSIM distributed from October 15, 1997 -- present
Bug # | Description | Affects | Reported | Fixed |
---|---|---|---|---|
8 | Application problems with the solaris2.6 library | Solaris 2.6 users | 01/03/98 | outstanding |
9 | Incorrect scheduling with in-order processors | Users using in-order processor model | 10/15/98 | 10/15/98 |
10 | Incorrect input/output handling | Users using file input/output | 12/10/98 | 12/10/98 |
11 | stdio.h macros incompatibility with gcc libraries | Users using file input/output macros | 12/10/98 | 12/10/98 |
12 | Membar inconsistency in system calls | Users using fread, sys_bzero, time, and times | 1/4/99 | 1/4/99 |
13 | Sign bit inconsistency in data forwarding | Users using conversion between signed/unsigned subword types | 1/4/99 | 1/4/99 |
14 | Problem with floating-point move conditional instructions | Codes with floating-point move conditional (generated by compiler in some cases) | 2/24/99 | 2/24/99 |
15 | Problem with write ancillary state register instruction | Code with write ancillary state registers in which the 2nd source register was other than %g0 (not seen on any sample codes that run on RSIM distribution version) | 2/24/99 | 3/2/99 |
16 | Problem with multiplication for long long data types | Codes which use long long data type for 64-bit integer arithmetic | 3/10/99 | 3/11/99 |
17 | Double invocation of address generation | Applications that stress the usage of the memory queue | 5/16/99 | 5/16/99 |
18 | Coherence protocol race in secondary cache | Configurations with write-back L1 caches | 5/25/99 | 5/25/99 |
19 | Some directory output port full cases not handled | Applications which stress directory outputs (affected code should seg-fault or die with error message) | 6/11/99 | 6/11/99 |
20 | Tree barriers assume power-of-2 number of processors | Applications run with non-power-of-2 number of processors | 3/21/98 | 3/21/98 |
21 | RSIM cannot run for more than 2 billion cycles | Some long-running applications | summer '97 | outstanding |
22 | Unnecessary warnings for directory code | No impact (except for a few extra messages printed) | 6/21/99 | 6/21/99 |
23 | Typos in predecoder | Possible impact if code includes SDIVcc or UDIVcc instructions with negative dividends | 10/22/99 | 10/22/99 |
24 | Conflicting use of typedef and enum for ReqType | Leads to errors with newer compilers | 10/22/99 | 10/22/99 |
25 | Compliation errors for xor, dirname, new in funcs.cc, mainsim.cc, FastNews.h | Leads to compilation errors with some compilers | Spring 03 | use suggested fix |
26 | Unresolved symbols when compiling applications | Leads to linker errors when building applications for RSIM on some OS verstions | Spring03 | use suggested fix |
Bugs in RSIM distributed from August 7, 1997 -- October 15, 1997:
Bug # | Description | Affects | Reported | Fixed |
---|---|---|---|---|
1 | Unhandled race condition between L1 and L2 write-back caches | Configurations with L1 write-back cache | 9/15/97 | 9/17/97 |
2 | Incorrect division of miss-type statistics (conflict vs. coherence) | Cache miss breakdown statistics | 9/23/97 | 9/23/97 |
3 | Access out of array bounds in MESI state maintenance at MSHRs | All (no expected impact) | 9/25/97 | 9/25/97 |
4 | Javascript utility to generate configuration file reports spurious power-of-2 errors for number of cache sets | Configurations with small caches and high set associativity | 9/25/97 | 9/25/97 |
5 | Too much memory allocated in cache pipeline initialization | All (no impact) | 9/28/97 | 9/28/97 |
6 | Possible cache inclusion violation on L2 dirty writebacks | Configurations with L1 write-through caches | 10/2/97 | 10/3/97 |
7 | Bus utilization statistics incorrect | All | 10/7/97 | 10/7/97 |
Class | Description |
---|---|
1 | Bug affects execution time, may need reruns |
2 | Bug affects execution time, affects only runs that failed |
3 | Bug does not affect execution time, affects only certain statistics |
4 | Bug relating to portability of simulator to a different machine |