Source files: src/Processor/exec.cc, src/Processor/pipestages.cc, src/Processor/branchresolve.cc, src/Processor/branchq.cc, src/Processor/stallq.cc, src/Processor/active.cc,
Header files: incl/Processor/units.h, incl/Processor/state.h
The CompleteQueues function processes instructions from the Running heap that have completed in a given cycle. For all non-memory instructions, this function calls the appropriate emulation function from src/Processor/funcs.cc and then inserts the instance onto the processor's DoneHeap. For memory instructions, this function marks the completion of address generation, and thus calls the Disambiguate function (described in Section 11). This function is also responsible for freeing functional units that have completed their functional unit delay, as determined from the FreeingUnits data structure. As each functional unit is freed, the processor checks to see if a queue of ready instructions has built up waiting for that unit. If so, one instruction is revived, and the issue function is invoked.
The function update_cycle processes instructions from the DoneHeap data structure. For each instruction removed from the DoneHeap in a cycle, update_cycle first sees if the completion of this instruction will allow a stalled processor to continue decoding instructions.
Next, update_cycle resolves completed branches. If the branch was unpredicted, update_cycle sets the processor PC and NPC appropriately and allows execution to continue. On a correct prediction, the GoodPrediction function is called. If this branch had already allocated a shadow mapper, this function calls RemoveFromBranchQ to free the shadow mapper, possibly yielding that shadow mapper to a later stalled branch. If the branch had not yet received a shadow mapper, it is no longer considered to be stalled for a mapper.
On the other hand, the BadPrediction function is called to resolve a mispredicted branch. If the branch (or its delay slot, as approriate) had allocated a shadow mapper, CopyBranchQ is used to revive the correct register mapping table. After that, FlushBranchQ is used to remove the shadow mapper associated with the current branch and all later branches. Then, FlushMems is invoked to remove all instructions from the memory unit after the branch or delay slot in question. FlushStallQ removes any possible item in the processor stall queue, and is followed by FlushActiveList, which removes all instructions after the branch or delay slot from the active list. FlushActiveList also removes entries from the tag-converter data structure, frees the registers renamed as destinations for the instructions being flushed, and negates the effects of any register windowing operations being flushed. After BadPrediction returns control to update_cycle, the processor sets its PC and NPC appropriately.
update_cycle then updates the physical register file with the results of the completed instruction and marks the instruction in the active list as having completed. The busy-bits of the destination registers are cleared, and the instructions in the distributed stall queue for these registers are checked. If a waiting instruction now has no more true dependencies, the function SendToFU is called to provide the register values to that instruction and possibly allow it to issue. If a memory instruction in the memory unit had been waiting on a destination register for an address dependence which is now cleared, the CalculateAddress function (described in Section 11) is used to send the instruction to the address generation unit.