RSIM provides compile-time options to enable copious debugging and diagnostic output to be printed to the standard output and to separate files. Such tracing information is likely to be very important to anyone seeking to modify RSIM. There are various compile time flags which the user can selectively turn on to get debugging information for one section of the system (e.g., the network interfaces, the first level cache), but it is often the case that the user will want all debugging flags available turned on together, as in the debugging makefiles provided with the RSIM distribution.
The processor debugging output is written into files called corefiles. Each processor has its own corefile, and the suffix of each file represents the processor number (with a corefile.i file for each processor with processor number i.) These files contain detailed information on each stage of simulation for every instruction.
The debugging output related to the memory hierarchy and network is printed on the simulation output file. This debugging information is also very detailed, providing information about nearly all relevant activity in the cache hierarchy, the directory, the busses, and the network interfaces.
Because of the amount of information provided by these debugging options, these files can quickly grow into several megabytes of data in just thousands of processor cycles. The ``-t'' and ``-c'' options described in Chapter 4 can be used to limit this tracing to the exact spot where the problem is suspected. In the case of deadlocks, this moment of simulation time can be determined to some extent through the use of the periodic partial statistics displayed by RSIM, as processors will usually stop graduating instructions soon after the deadlock ensues.