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RSIM instruction set architecture

 

RSIM simulates applications compiled and linked for SPARC V9/Solaris using ordinary SPARC compilers and linkers, with the following exceptions.

First, although RSIM supports most important user-mode SPARC V9 instructions, there are a few unsupported instructions. More specifically, all instructions generated by current C compilers for the UltraSPARC-I or UltraSPARC-II with Solaris 2.5 or 2.6 are supported. Unsupported instructions that may be most important on other SPARC systems include 64-bit integer register operations and quadruple-precision floating-point instructions. The other unsupported instructions are tcc, flush, flushw, and tagged add and subtract (described in the SPARC V9 ISA definition [23]).

Second, the system trap convention supported by RSIM differs from that of Solaris or any other operating system. Therefore, standard libraries and functions that rely on such traps cannot be directly used. We provide an RSIM applications library to support such commonly used libraries and functions; all applications must be linked with this library. Nevertheless, there are some unsupported traps and related functions (e.g., strftime), and our library has only been tested for application programs written in C. More details are given in Chapter 5.

The main simulator actually interprets input files generated by running an offline predecoder on the application executables generated. The predecoder generates a more loosely-encoded target format, which is used for all internal processing in RSIM. This removes the overhead of runtime instruction decoding and will facilitate modifications of RSIM to simulate other RISC ISAs. RSIM can use a predecoder because this simulator does not support self-modifying or dynamically generated code.



Vijay Sadananda Pai
Thu Aug 7 14:18:56 CDT 1997