General-Purpose Architectures for 

Multimedia Applications

 Overview

Multimedia and communications applications are expected to form a large part of the workload on a growing number of systems, including future handheld computers, wireless telephones, laptop computers, desktop systems, wireless basestations, and network switches and routers. As these applications become more complex, several considerations argue for the use of general-purpose architectures for them (e.g., compiler-friendliness, upgradability, and portability). These applications, however,  impose many new challenges for general-purpose architectures due to their real-time nature and stringent computation, energy, and bandwidth requirements, and due to the mobile, dynamic, and small form-factor platforms on which they often run. 

Our goal is to develop general-purpose architectures for multimedia and communications applications. Our results so far and ongoing work are summarized below.

Execution time predictability

One commonly cited shortcoming of general-purpose processors is that their complex features (e.g., out-of-order issue) result in unpredictable execution times, making them unsuitable for real-time multimedia applications. Our ISCA'01 paper tests this conjecture by examining execution time variability at the frame granularity for several multimedia applications. We find that while there is often some variability, it is mostly caused by the application algorithm and input. In contrast to conventional wisdom, aggressive architectural features induce little additional variability and unpredictability. 

Hardware adaptation to save energy

Frame-level execution time variability (seen in our ISCA'01 paper) motivates frame-level hardware adaptation to save energy. We use our variability analysis from ISCA'01 to develop an adaptation control algorithm for two forms of hardware adaptation to save energy - architectural adaptation and dynamic voltage (and frequency) scaling or DVS. To our knowledge, this is the first integrated algorithm to control both DVS and architecture adaptation targeted for multimedia applications. We have evaluated the control algorithm and analyzed the interaction between the two forms of adaptation. The paper will appear in MICRO'01 and will be posted here shortly.

Analysis of media applications on current general-purpose processors

Our ISCA'99 paper was our first step in understanding the performance of multimedia applications on general-purpose processors. The paper finds that several conventional processor techniques that enhance instruction-level parallelism (ILP) and the recent media ISA extensions are generally effective for our media benchmarks. The memory behavior of the benchmarks makes large caches generally ineffective, but software prefetching can often be used to substantially improve memory performance. After the use of software prefetching, our benchmarks become primarily compute (vs. memory) bound, motivating a focus on improving computation speed.

Reconfigurable caches

While caches are generally not effective for media applications, a large number of on-chip transistors will continue to be
devoted to caches for other general-purpose applications. Our ISCA'00 paper proposes a new reconfigurable cache organization that allows the cache SRAM arrays to be dynamically divided into partitions that can be used for other processor activities. For media applications, we illustrate the use of such reconfigurable caches for instruction memoization to improve computation speed.

Evaluation tools and workloads

Our previous work developed new architecture evaluation techniques and the RSIM simulator, the first publicly available simulator for ILP multiprocessor systems. We continue to develop new evaluation techniques and extend RSIM to improve both evaluation speed and functionality. We are also developing benchmark suites for multimedia and communications applications, which will be available with the next release of RSIM.

Ongoing work

We are currently working on various aspects related to the design of general-purpose architectures for multimedia and communications applications. We take an integrated systems approach that considers the network, operating system, and application layers. Our ongoing work includes integrating our hardware adaptation control algorithm with the rest of the system, architecture-aware real-time scheduling, and exploiting special features of multimedia and communications applications for increased performance, energy savings, and reliability.

People

Faculty: 
            Sarita Adve

Students:
            Christopher J. Hughes
            Rohit Jain
            Ruchira Sasanka
            Jayanth Srinivasan

Alumni:
            Parthasarathy Ranganathan, Ph.D. 2000 (Rice University), 
                               Ph.D. Thesis: General-Purpose Architectures for Media Processing and Database Workloads
                               First employment: Compaq Western Research Laboratory
                                                       
            Praful Kaul, M.S. 2000
                               M.S. Thesis: Variability in the Execution of Multimedia Applications and Implications for Architecture 
                               First employment: Transmeta Corporation
                                                       

Visitors:
            Chanik Park, Seoul National University, visiting from 2000-01

Publications

Funding

This project is funded by the Alfred P. Sloan Research Foundation, the National Science Foundation CCR-0096126, and the University of Illinois.