Sarita Adve's Research Group
University of Illinois at Urbana-Champaign


  • Congratulations to Khalique Ahmed for depositing his M.S. thesis, July 2018!

  • Released HeteroSync to the open source community! Check it out!

  • Radha presented at DSN, June 2018!

  • Sarita is elected as ACM SIG Governing Board (SGB) representative to ACM Council!

  • Sarita is featured in CS@Illinois for her collaboration in the DARPA JUMP Center, June 2018!

  • Our paper titled "Optimizing Software-Directed Instruction Replication for GPU Error Detection" has been accepted for publication at SC 2018!

  • Matt was selected as an Honorable Mention for the 2018 SIGARCH/TCCA Outstanding Dissertation Award, June 2018!

  • John presented at ISCA, June 2018!

  • Sarita is featured in CRA research highlight, April 2018!

  • Radha was selected as a participent in the 6th Heidelberg Laureate Forum, April 2018!

  • Adel received the Graduate Student Outstanding Ambassador Award, April 2018!

  • Our paper titled "Spandex: A Generalized Interface for Flexible Heterogeneous Coherence" has been accepted for publication at ISCA 2018!

  • Our paper titled "Impact of Software Approximation on the Resiliency of a Video Summarization System" has been accepted for publication at DSN 2018!

  • Sarita joins the JUMP Center, a collaborative research effort between multiple universities and DARPA, aiming to improve performance, efficiency, and overall capabilities of future electronic systems, February 2018!

  • Sarita is interviewed for HiPEAC voices, January 2018!

  • Sarita is interviewed by, "Q&A with Two Women Behind the MICRO-50 Statement", November 2017!

  • Our paper titled "HPVM: Heterogeneous Parallel Virtual Machine" has been accepted for publication at PPoPP 2018!

  • Matt received the 2018 David J. Kuck Outstanding Ph.D. Thesis Award, October 2017

  • Sarita was invited to join DARPA's Information Science and Technology Study Group (ISAT) for a three year appointment!

     News Archive


Our group's research focus is in computer architecture, but we take a full system view of the problems we solve and collaborate closely with faculty and students from other areas, including applications, software, and hardware.

The looming end of transistor scaling (Moore's law) poses a major disruption to the field of computing. Computer architects can enable sustaining the performance predictions of Moore's law through system design innovations that span the hardware-software boundary. Our group is exploring specialization and approximation to build hardware and software systems that will enable new applications in AI, augmented reality, and other emerging domains:

    Scalable Specialization
    Approximate Computing


Sarita Adve's Group Picture

(front) Abdulrahman Mahmoud, Khalique Ahmed, Sarita Adve, and Matt Sinclair,
(back) Lin Cheng, Gio Salvador, Muhammad Huzaifa, Radha Venkatagiri, John Alsop

We are very proud that for three of the last five years (2014-18), a PhD thesis from our group has been selected as one of the Illinois CS department's two nominations for the ACM doctoral dissertation award.

Matt Sinclair for  2018 :
Efficient Coherence and Consistency for Specialized Memory Hierarchies

Hyojin Sung for 2016 :
DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism

Siva Sastry Hari for 2014 :
Preserving Application Reliability on Unreliable Hardware


  • Memory consistency models: Co-developed the memory models for the C++ and Java programming languages, based on our early work on data-race-free models

  • Hardware reliability: co-developed the concept of lifetime reliability aware architectures and dynamic reliability management, pioneered techniques for ultra-low cost software-driven hardware resiliency

  • Power management: Co-designed GRACE, one of the first systems to implement cross-layer energy management

  • Memory level parallelism: Some of the first papers on exploiting instruction-level parallelism (ILP) for memory system performance

  • Evaluation techniques: Developed RSIM, the first publicly available multiprocessor simulator with out-of-order processors